FPGA Engineering Manager

Denver, COfull timeOn Site

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senior

$140k–$215k

H1B: no

Trueanomalyinc FPGA Engineering Manager at True Anomaly leads a team designing high speed digital and FPGA solutions for spacecraft. The role includes technical leadership, team management, and ensuring delivery of radiation-tolerant aerospace designs.

Responsibilities

Build, manage, and mentor an FPGA engineering team for spacecraft devices
Drive the design of FPGAs/SoCs/SoMs and integration of those designs into end item products
Define FPGA development roadmaps aligned with spacecraft system needs
Own end-to-end FPGA design activities: requirements capture, architecture, functional block definition, simulation, synthesis, timing closure, verification, and hardware integration
Develop full systems solutions, including memory interfaces, high speed buses, clock domains, and signal integrity analyses.
Manage and communicate product development status and issues across entire Product Development Life-Cycle through reviews and demonstrations
Drive adherence to radiation-hardening and defense/aerospace FPGA development standards.
Collaborate cross-functionally with systems, software, avionics, and test teams to ensure FPGA functionality integrates seamlessly with the spacecraft
Establish best practices in design reviews, configuration management, and verification methodologies
Manage schedules, budgets, and technical risk within the FPGA development domain

Qualification

Deep expertise with VHDL/VerilogFamiliarity with Zynq Ultrascale+

Required

Bachelor’s or Master’s degree in Computer Science, Electrical/Computer Engineering, or related field.
10+ years of professional experience with FPGA development and 5+ year of experience with spacecraft systems
Previous experience as a technical team lead
Deep expertise with VHDL/Verilog, simulation tools, timing analysis, and FPGA synthesis flows
Familiarity with Zynq Ultrascale+, ProASIC 3, PolarFire, SmartFusion 2, Artix7, etc. technologies
Experience with high-speed interfaces (PCIe, Ethernet, SpaceWire)
Familiarity with fault-tolerant/redundant design methods (A/B failover, triple modular redundancy, etc.)
Understanding of radiation effects on digital logic and mitigation strategies

Preferred

Experience with analog and digital electrical design practices
Familiarity with lab debug tools (power supplies, oscilloscopes, logic analyzers, etc.)
Familiarity with procedural programming languages, such as C, C++, python
Experience debugging system level interactions in a HIL/SIL environment