Sitimecorporation Senior Analog Design Engineer leads development of circuit blocks for advanced clock and timing products from specification through silicon. Collaborates with cross-functional teams and supports validation and product release.
Responsibilities
Develop circuit specifications for high-performance timing products
Design analog and custom digital CMOS circuits for high-performance timing products
Incorporate circuit blocks into the complete chip design
Collaborate with distributed cross-functional teams, including layout, digital, system design, and validation
Test, debug, and characterize lab prototypes
Support product validation and customer applications
Qualification
English proficiency is required
Required
Master’s or PhD degree in Electrical Engineering.
6+ years of relevant analog/mixed-signal IC design experience.
Proven experience in CMOS and/or BiCMOS IC design.
Strong knowledge of integrated circuit design, device physics, and advanced process technologies
Experience designing PLLs or related blocks such as VCOs, phase detectors, charge pumps, on-chip regulators, and supporting circuits
Solid understanding of transistor behavior, circuit noise theory, and phase-noise concepts
Proficiency with the Cadence analog/mixed-signal simulation toolset
Familiarity with analog/mixed-signal design flow, simulation methods, design rules and post-layout verification
Experience with analog behavioral modeling, SystemVerilog, Verilog-A, and AMS
Hands-on lab test and characterization experience
English proficiency is required, including the ability to effectively communicate, collaborate, and perform job responsibilities in a professional business environment.
It is not necessary to meet all job requirements to be a qualified candidate for the position.