Sitimecorporation Principal FPGA Design Engineer at SiTime leading FPGA architecture and development for MEMS timing product testing platforms. Provides technical leadership and drives cross-functional initiatives.
Responsibilities
Architect and implement scalable FPGA solutions for internal hardware platforms used in MEMS timing product testing
Lead cross-functional technical initiatives involving CMOS design, MEMS design, systems and test engineering, validation, and production teams
Define and drive system-level requirements, ensuring alignment across hardware, software, and test domains
Own the full FPGA lifecycle: architecture, RTL design, simulation, synthesis, timing closure, and bring-up
Develop reusable IP blocks and maintain a modular, maintainable FPGA infrastructure
Champion design reviews, documentation standards, and continuous improvement practices
Provide technical leadership and mentorship to junior engineers and influence strategic direction across multiple programs
Act as a key technical liaison between engineering, product, and operations teams to ensure seamless integration and execution
Qualification
MS in Electrical EngineeringDeep expertise in Verilog/VHDLStrong understanding of timing analysisExperience with lab bring-upExcellent communicationAt SiTime
Required
MS in Electrical Engineering, Computer Engineering, or related field
10+ years of hands-on experience in FPGA architecture and development (Xilinx, Intel/Altera, or similar)
Deep expertise in Verilog/VHDL, simulation tools (ModelSim, Vivado, etc.), and scripting (Python, TCL)
Proven track record in designing systems with low jitter, low phase noise, and high signal fidelity
Strong understanding of timing analysis, clock domain crossing, and high-speed interfaces (PCIe, DDR, SERDES)
Experience with lab bring-up, debugging tools (logic analyzers, oscilloscopes), and test automation
Demonstrated leadership in driving cross-functional initiatives and delivering complex technical programs
Excellent communication, collaboration, and stakeholder management skills
Preferred
Experience in MEMS or timing product domains
Familiarity with hardware/software co-design and embedded systems
Exposure to production test environments and ATE systems
Experience presenting technical strategies and outcomes to executive leadership
At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.
The annual base salary range for this role is $148,320.00 – $203,940.00. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.