Sr. IC Package Design Engineer (Silicon Engineering)

Irvine, CAfull time

On Site

senior

$165k–$260k

H1B: no

SpaceX Sr. IC Package Design Engineer at SpaceX responsible for advanced package selection, layout, optimization, design verification, and tapeout for custom ASICs and RFICs. Collaborate cross-functionally to optimize silicon floor plan and package design for Starlink satellite systems.

Responsibilities

Own and drive advanced package selection, new product BGA configuration and package structure
Responsible for package/SIP layout, optimization, design verification and tapeout
Interface and coordinate with cross-functional groups throughout SpaceX on new product package selection, feasibility analysis and design
Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out
Simulate and optimize signal/power integrity and RF performance of the package design
Drive methodology, innovations, and productivity improvements in package design