SpaceX AMS Verification Engineer at SpaceX responsible for developing verification flows and testbenches for RFICs and RF-SoCs. Collaborate with designers and test engineering teams to improve simulation accuracy and develop test plans.
Responsibilities
Develop and own “analog-on-top” and “digital-on-top” design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
Work with ATE test engineering team to develop and prototype testplans
Setup and run EM/IR simulations
Qualification
Experience in System-VerilogADDITIONAL REQUIREMENTS
Required
Bachelor’s degree in an engineering discipline
1+ years of research and/or industry experience in the field of integrated circuit design/verification
Preferred
Master’s degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
Experience with AMS simulation tools and flows
Experience with annotated gate-level simulation within an AMS simulator
Experience in System-Verilog, UVM, Python
Experience in writing behavioral models for analog/mixed-mode IPs in Verilog-A/AMS
Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
Understanding of combinational logic and basic digital circuit blocks, such as flip-flops, counters, buffers, synchronizers, serializers/de-serializers, etc.; ability to understand RTL and gate-level netlists
