FPGA Engineer

Fort Collins, CO (CO-12)full timeOn Site

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senior

$143k–$191k

H1B: no

Anduril Industries The FPGA Engineer at Anduril Industries leads FPGA architecture, design, and verification for airborne radar systems, translating signal processing algorithms into FPGA implementations. This role establishes FPGA design processes and collaborates with cross-site teams to ensure integration and consistency.

Responsibilities

Lead FPGA architecture, design, and verification efforts for airborne radar systems from concept through production
Translate signal processing algorithms into efficient, high-performance FPGA implementations on Altera SOC/FPGA platforms
Establish and drive robust FPGA design processes, coding standards, and verification methodologies for the airborne products team
Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites
Design and implement digital signal processing chains for radar systems, including data acquisition, filtering, and real-time processing
Perform timing analysis, resource optimization, and debugging of complex FPGA designs
Develop and maintain design documentation, including architecture specifications, design reviews, and verification plans
Mentor and guide other engineers as the team scales FPGA capabilities

Qualification

Strong understanding of timing closureExperience with Xilinx Zynq UltraScale+

Required

Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field.
12+ years of professional experience in FPGA design and development
Strong expertise in RTL design using SystemVerilog and/or VHDL
Demonstrated experience with Altera FPGA devices and development tools (Vivado, Quartus, etc.)
Proven experience in digital signal processing implementation on FPGAs
Self-directed technical leadership with ability to independently drive projects from requirements to implementation
Experience with FPGA verification methodologies and simulation tools
Strong understanding of timing closure, resource optimization, and FPGA design constraints
Eligible to obtain and maintain an active U.S. Secret security clearance

Preferred

Experience with radar systems or software-defined radio development
Familiarity with high-speed interfaces (PCIe, Ethernet, JESD204B, etc.)
Experience with Xilinx Zynq UltraScale+, Altera AgileX, or RFSoC platforms
Knowledge of embedded software development for FPGA SoC platforms
Experience with MATLAB and algorithm-to-hardware workflows
Understanding of RF systems and digital front-end design
Familiarity with DO-254 or similar hardware design standards for airborne systems
Experience with version control (Git) and continuous integration workflows