Advanced R&D - Physical Design Engineer

Saint-Sulpice · Remotefull timeRemote

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H1B: no

Kandou AI Advanced R&D - Physical Design Engineer at Kandou AI leads block-level physical implementation from netlist to sign-off for advanced FinFET nodes. The role ensures PPA targets are met through synthesis, floorplanning, placement, CTS, and routing.

Responsibilities

Drive block synthesis, floorplanning, placement optimization, CTS, and routing
Develop and refine SDC constraints
Collaborate with digital design team to resolve logic or architectural bottlenecks
Generate progress reports and prepare sign-off packages for tape-out
Execute timing closure across multiple corners and modes
Drive full physical verification closure sign-off

Qualification

Deep understanding of SDC creationStrong scripting skills (TclRequired EducationMasters or Phhttps

Required

Expert proficiency with industry-standard implementation and sign-off tools (e.g., Cadence Genus/Innovus/Tempus or Synopsys Design Compiler/ICC2/PrimeTime, and Calibre).
Deep understanding of SDC creation, and MCMM timing management.
Strong scripting skills (Tcl, Python) for flow automation and design data analysis.
Analytical mindset to debug congestion routing issues, and complex timing violations.
Self-motivated with strong sense of ownership; effective communicator and team player
Required Education
Masters or Ph.D. in E.E., Communications or other relevant fields
https://kandou.ai/