FPGA Design Engineer (R5347)

Seattle, Washingtonfull time

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f7d8749a-72d6-407c-bf98-292ea630c73a The FPGA Design Engineer designs, implements, verifies, and debugs FPGA-based solutions for UAV avionics. This role collaborates across hardware, firmware, and software teams to develop high-performance digital communication modules.

Responsibilities

We are seeking a highly motivated FPGA Design Engineer with experience developing high-performance digital designs.
The ideal candidate will be responsible for designing, implementing, verifying, and debugging FPGA-based solutions for complex avionics solutions for cutting-edge Unmanned Aerial Vehicles (UAV). This role requires strong digital design fundamentals, experience with AMD/Xilinx development tools, and the ability to collaborate across hardware, firmware, and software teams.
Design and develop FPGA-based communication modules for advanced UAV platforms.
Develop solutions that enable precise timing synchronization and redundance across flight controllers.
Integrate FPGA solutions with system-level architecture in collaboration with cross-functional engineering teams.
Perform synthesis, implementation, timing closure, bitstream generation.
Debug, test, and optimize for reliability, latency, and throughput.
Collaborate with PCB designers during board bring-up and hardware validation.
Contribute to FPGA architecture discussions and help define long-term technical direction within the platform.
Participate in design reviews and maintain engineering documentation.

Qualification

Strong experience with FPGA designDemonstrated ability to build reliableSolid understanding of timing closureComfortable working in a fast-pacedExperience developing flight computersExperience with AXI4

Required

B.S., M.S, PhD degree in Electrical Engineering, Computer Engineering or STEM (Science, Technology, Engineering, or Mathematics) discipline, such as Aerospace, Mechanical, or Electrical Engineering
Strong experience with FPGA design, implementation, and verification using VHDL or SystemVerilog.
Demonstrated ability to build reliable, high-performance digital communication systems.
Solid understanding of timing closure, clock domain crossing, and system-level integration.
Comfortable working in a fast-paced, collaborative environment with evolving requirements.
Strong debugging and problem-solving skills.
Knowledge of FPGA timing analysis and timing closure techniques.
Familiarity with version control tools such as Git.
Strong debugging and problem-solving skills.