Senior Director, SerDes Digital Design

Required

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• Extensive experience in digital IC design, with significant technical and organizational leadership responsibilities.
• Proven experience designing and delivering digital functionality for 100G+ per-lane SerDes PHYs.
• Strong understanding of high-speed SerDes architecture and the interaction among digital signal processing, analog front-end circuits, clocking, calibration, and link adaptation.
• Demonstrated experience leading complex RTL development, digital implementation, integration, and silicon delivery.
• Strong knowledge of digital design methodologies, including microarchitecture, synthesis, timing closure, clock-domain crossing, low-power design, and design-for-test considerations.
• Experience driving digital verification and system integration for complex mixed-signal products.
• Proven ability to lead multidisciplinary engineering efforts, resolve challenging technical issues, and deliver production-quality silicon.
• Demonstrated ability to recruit, develop, and retain strong engineering talent while building a collaborative, high-performing organization.
• Experience delivering SerDes digital subsystems across multiple product generations or into production volume.
• Experience with high-performance SerDes DSP architectures, including equalization, digital filtering, adaptation, and coefficient-update mechanisms.
• Experience implementing digital calibration and control for high-speed analog and mixed-signal circuits, including ADCs, DACs, PLLs, clocking circuits, and transmitter or receiver front ends.