Quadric Design Verification Intern at Quadric to support verification of next-generation processor architecture. The role includes documenting test plans, writing and debugging tests, and generating coverage for the GPNPU.
Responsibilities
This is a chance to get hands-on experience verifying a next-generation processor architecture, working directly alongside our hardware team as we build supercomputer technology for the Edge.
You'll support the Design Verification team in documenting test plans, writing and debugging tests, and generating coverage for Quadric's GPNPU — gaining exposure to real verification methodologies used on CPU and GPU-class designs, and working closely with the architects and designers who built them.
Note: Our preference is for this internship to be based out of our Burlingame, California office. Candidates should be based in the Bay Area or able to relocate for the internship period and available to work on site.
Support Verification Planning
Collaborate with architects and designers to document test plans for the GPNPU.
Write & Debug Tests
Write and debug tests against the processor's architecture and micro-architecture.
Generate and analyze coverage to help assess verification completeness.
Collaborate Across the Team
Work closely with hardware architects and designers to understand design intent and clarify verification requirements.
Communicate findings, blockers, and technical questions clearly to the team.
What Success Looks Like
Qualification
Currently pursuing a Bachelor'sProficient in either SystemVerilog
Required
Currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field.
Familiarity with verification methodologies for CPU or GPU designs.
Proficient in either SystemVerilog, SystemC, or C/C++ (UVM is a plus).
Prepared to collaborate with architects and designers to document test plans, write and debug tests, and generate coverage.
Demonstrated capability in problem-solving, debugging, and clear technical communication.
Preferred
Coursework or project experience with computer architecture, RTL design, ML systems, or performance engineering.
Exposure to assembly or low-level code generation.
Adept with scripting languages like Python and using LLMs to get things done.
