Nuvacore Formal Verification Engineer at Nuvacore to prove CPU correctness using formal methods. Responsibilities include planning verification scope, building formal environments, and applying model checking and equivalence checking.
Responsibilities
Plan & Strategy: Drive the verification scope and formal test plan for each verification problem — turning the micro-architecture specification into the properties to prove.
Formal Environment: Build the formal environment — assumptions, constraints, assertions, and cover properties — plus reusable, optimized formal models.
Proof & Bug Hunting: Apply model checking, equivalence checking, and abstraction to reach full or bounded proofs, and hunt deep bugs in areas such as cache coherence, memory consistency, and speculative execution.
Debug & Design Feedback: Debug counterexamples to root cause and partner directly with designers to fix and improve the micro-architecture.
Flow & Automation: Build and maintain the end-to-end formal flow — automation (Python/TCL), assertion libraries shared across formal and simulation, and tool-issue resolution with vendors.
Cross-functional Collaboration: Review formal setups and proofs with the design team, and partner closely across the DV team.
Qualification
Strong scripting (Python
Required
Degree in Electrical/Computer Engineering, Computer Science, or Mathematics, or equivalent practical experience.
15+ years (Principal) or 4+ years (Senior Engineer) of design-verification experience, with hands-on formal verification.
Hands-on formal techniques — model checking and/or equivalence checking — through to proof convergence.
Strong Verilog/SystemVerilog and assertions / temporal logic.
Strong knowledge of CPU micro-architecture and digital logic.
Strong scripting (Python; TCL/Perl a plus), analytical, and debug skills.
Proficiency with industry formal tools (e.g. Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal).
Taking complex verification problems to proof closure — abstraction, bounded-proof management, and equivalence checking (LEC/SEC) against golden references.
Formal verification of CPU domains such as cache coherence, memory consistency, speculative execution, or data path.
Security formal verification or theorem proving.
Understanding of how formal complements dynamic simulation, and shared assertion libraries.
Mentoring engineers and collaborating across distributed teams.
Preferred
Proficiency with industry formal tools such as Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal
Experience taking complex verification problems to proof closure including abstraction and bounded-proof management
Formal verification of CPU domains such as cache coherence, memory consistency, speculative execution, or data path
Security formal verification or theorem proving
Understanding of how formal complements dynamic simulation and shared assertion libraries
Mentoring engineers and collaborating across distributed teams
