Physical Design Engineer, ML4PD

Austinfull timeOn Site

Apply on Employer Site

$100k–$500k

H1B: yes

Tenstorrent Physical Design Engineer at Tenstorrent contributing to physical design of high-performance AI/ML chips from synthesis through tapeout. Optimize floorplanning, timing, power, performance, and area across multiple IPs.

Responsibilities

Contribute to the physical design of high-performance chips for AI/ML architectures from synthesis through tapeout
Partner with front-end and physical design engineers to optimize floorplanning, timing, power, performance, and area across multiple IPs
Build end-to-end ASIC expertise while learning from experienced engineers across the chip development process

Qualification

A BSExperience with synthesisStrong TclWhat You Will LearnHow architecture

Required

An engineer excited to work on high-performance designs for industry-leading AI/ML architectures
A collaborative problem solver who enjoys working with experienced engineers across ASIC disciplines
Grounded in logic design fundamentals and gate- and transistor-level implementation
Curious about how early architectural and RTL decisions shape physical implementation and final chip quality
A BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with strong logic design fundamentals
Experience with synthesis, place-and-route flows, and physical design tools, plus familiarity with timing, EM/IR, and power analysis
The ability to contribute across floorplanning, clocking, I/O planning, timing closure, area improvement, and power optimization
Strong Tcl, Perl, Shell, and/or Python skills, along with knowledge of low-power techniques such as power gating, multi-Vt, and voltage scaling
What You Will Learn
The complete ASIC implementation lifecycle, from synthesis through signoff and tapeout
How architecture, front-end design, and RTL decisions influence physical implementation outcomes
How to develop flows and use experiments to optimize power, performance, and area