Our team researches the next-generation memory solutions for AI workloads, including HBM, DRAM, and CXL memory expansion. This summer, you'll work on servers with Samsung CXL memory expanders and NVIDIA GPUs. You'll see how agentic AI workloads stress memory systems and how those findings feed into future memory product architecture design.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy

Reports to: Sr. Director

Build runtime adapters and a trace record/replay harness for AI agent frameworks

Develop micro-kernel and end-to-end agent workload benchmarks that stress CPU, memory, storage and accelerator subsystems

Profile agent workloads with perf, eBPF, PMUs and NVML/DCGM to break down per-turn latency and memory bandwidth usage

Measure host DDR5, GPU HBM and CXL.mem bandwidth and latency across Intel Xeon and/or AMD EPYC servers

Evaluate multi-agent KV-cache sharing and CXL memory expansion on Samsung CXL expanders

Build an initial memory tiering cost model (HBM/DDR5/CXL) for long-running MoE agent workloads

Present findings in weekly team meetings, then deliver a final report and presentation

Complete other responsibilities as assigned.

Pursuing PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field

Intern, AI Systems Performance Engineer

Responsibilities

Qualification

Required

Benefits

Company

Samsung Semiconductor

More roles at Samsung Semiconductor