Astera Labs is seeking System Validation Engineers to lead post-silicon bring-up and system validation for high-performance PCIe fabric switch products used in AI and cloud data centers. As part of the AI Fabric Engineering group, you will design and execute validation plans, automate data-centric test flows, drive root-cause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real-world performance and interoperability.

Based in San Jose, you will collaborate with cross-functional teams to certify products against demanding system requirements and prepare new silicon and platforms for customer integration and launch. This is an opportunity to help shape validation strategy, automation infrastructure, and debug methodologies for purpose-built connectivity solutions enabling rack-scale AI infrastructure.

Success Looks Like

New silicon and platforms are brought up on schedule with reproducible validation results.

Automated test suites reduce manual effort and provide clear pass/fail, compliance, and performance metrics.

System issues are resolved rapidly through data-backed root-cause analysis, with strong technical communication and customer satisfaction during integration.

Validation Planning & Strategy

Create comprehensive validation plans for AI fabric switch products covering functionality, performance, reliability, stress, and interoperability.

Translate customer and system requirements into measurable test objectives, coverage goals, and product certification criteria.

Contribute to PCIe compliance testing strategies and adapt consortium test cases for execution from x86 and ARM platforms.

Produce clear, data-driven validation reports, status updates, and specification-compliance assessments for internal stakeholders and customers.

Silicon & System Bring-Up

Principal System Validation Engineer (AI Fabric Switches)

Responsibilities

Qualification

Required

Preferred

Company

Astera Labs

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