Senior SoC Verification/Validation Engineer

San Josefull time

On Site

senior

H1B: yes

Astera Labs Senior SoC Verification/Validation Engineer at Astera Labs responsible for validating complex SoCs for AI connectivity and cloud infrastructure on emulation platforms. Collaborates with cross-functional teams to define and execute validation plans.

Responsibilities

We are looking for Senior SoC Verification/Validation Engineer who are passionate about bringing next-generation SoCs to life on industry-leading emulation platforms. You will play a critical role in validating complex SoCs for AI connectivity and cloud infrastructure, ensuring functionality and performance well before silicon tape-out.
Basic Responsibilities
Play a key role in developing complex SOCs for AI connectivity and cloud infrastructures
Bring up and validate high-speed serial interfaces such as PCIe, Ethernet and UALink, and overall SoC functionality
Collaborate closely with Architecture, Design, Verification, and SW/FW teams to define and execute functional/performance validation plans
Develop C/C++ FW and tests to validate and execute all test plan items
Build tools and methodologies to validate and debug all HW and SW/FW issues on the emulation platform
Required Qualification
BS/MS in Electrical Engineering, Computer Engineering or related field.
5+ years of hands-on experience in pre-silicon verification/validation.
Strong hands-on experience in running and debugging SOC simulation.
Protocol knowledge in high-speed protocols such as PCIe, UALink and/or Ethernet is essential

Qualification

BS/MS in Electrical EngineeringStrong debugging and analytical skillsThe base salary range is $165

Required

BS/MS in Electrical Engineering, Computer Engineering or related field
5+ years of hands-on experience in pre-silicon verification/validation
Strong hands-on experience in running and debugging SOC simulation
Protocol knowledge in high-speed protocols such as PCIe, UALink and/or Ethernet
Proficiency in programming and scripting languages (System Verilog, C/C++, Python)
Strong debugging and analytical skills
Excellent communication skills and ability to work independently

Preferred

Bring up and validation experience using the industry standard emulation platforms (Palladium or Zebu)
Hands-on experience in running and debugging SOC simulation and emulation platforms.
The base salary range is $165,000 USD - $195,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Company

Astera Labs

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Source: greenhouse

Active within the past hour

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Must-Have Skills for This Role

PCIeEthernetUALinkSystem VerilogC/C++Python

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Senior SoC Verification/Validation Engineer at Astera Labs · LumiJobs