Classification and marking: DSCP and 802.1p to traffic class, trust, TC-to-queue, remarking, port versus switch map binding, classification miss, ACL rewrite

Queueing: unicast and multicast queues, counters, occupancy, watermarks, drops

Scheduling: strict priority, WRR/DWRR, hierarchy, shaping, rate limiting, fairness under oversubscription

Buffering: ingress and egress pools, static and dynamic thresholds, priority groups, headroom, reserved versus shared

PFC and lossless Ethernet: pause, headroom, lossless queues, watchdog, storm and deadlock, DCB

ECN and WRED: thresholds, drop probability, ECT/CE, interaction with DCQCN under RoCEv2

Policing: color-blind and color-aware, CIR/PIR/CBS/PBS, trTCM

Forwarding and counters: L2/L3, ECMP, mirror and sample, telemetry that makes the above observable

Own the validation strategy, test plans, coverage, and release entry/exit criteria for the features above

Qualify lossless and congestion behavior under RoCEv2 and GPU collectives (NCCL/RCCL) at line rate, including incast, PFC headroom, ECN accuracy, and no-drop

Build the frameworks and debug tools the team depends on, including model-based checks of classification, queueing, scheduling, and drop or mark outcomes

Lead root-cause analysis across software, SDK, model, silicon, and Linux, and decide when the spec, the implementation, or the test is wrong

Sr. Principal Engineer, Scale-Up (Switch Silicon & Traffic Management)

Responsibilities

Qualification

Required

Preferred

Company

Upscale AI

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