Samsung Semiconductor Inc. is looking for a talent that has strong background and experience on design of DRAM technology. The candidate will be developing the next generation memory technology.

The Principal Engineer of DRAM Circuit Design will be responsible for growing Samsung’s memory business, building technology leadership and market opportunities

Location: Onsite at our San Jose office/headquarters 5 days a week with an average of 10% travel.

Develop DRAM architecture and optimize floor plan for next generation DRAM

Develop the Row, Column Bank circuit design, Data path and related test modes

Identify device requirements for the advanced memory product design

Collaborate with process integration, device modeling group for DRAM design architecture/circuit development and technology optimization

Characterize power delivery network related performance and optimize the circuit and architecture

Analyze electrical data from Si and validate new core design architecture performance

Engage with cross-function teams such as process integration, quality assurance and product engineers

Documentation for design specification, performance analysis and test plan etc.

Technical interactions with internal and external customers.

Principal Engineer of DRAM Circuit Design

Responsibilities

Qualification

Required

Benefits

Company

Samsung Semiconductor

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